1. Field of the Invention
The present invention relates to a process for making a semiconductor device and, more particularly, to a method of estimating the remaining film thickness distribution for use in correction of a mask for the production of a semiconductor device, a method of correcting the mask with this estimation method, and a process for making a semiconductor device with the corrected mask.
2. Description of the Related Art
As the degree of integration of semiconductor devices increases, an increasing number of technologies are used to isolate adjacent semiconductor devices by insulation. Among them, the trench isolation method by which adjacent semiconductor devices are isolated by the insulation film embedded in a trench makes it possible to reduce the isolation width so much that it is useful for large-scale integration. This trench isolation method includes a shallow trench isolation (STI)-chemical mechanical polishing (CMP) process.
In the STI-CMP process, a trench is formed by etching a surface protective film and a semiconductor substrate with a patterning mask that has a mask pattern for forming an active region between device isolation trenches. Then, an insulation film is formed to fill the trench and cover the active region. This insulation film is formed by a high density plasma (HDP)-chemical vapor deposition (CVD) process. After the HDP-CVD process, a predetermined area of the insulation film is removed by etching with an insulation film removing mask that has a mask pattern for removing the insulation film. The predetermined area is a portion of the active region having a short side that has a predetermined length such as 2.4 um or more. Then, CMP is made onto the insulation film to expose the surface protection film, thereby forming a device isolation section that the insulation film is filled in the device isolation trench. See Japanese patent application Kokai No. 2000-349145.
However, the above STI-CMP process sometimes makes both an active coarse region where the active region exists sparsely and an active dense region where the density of active region is high. In the mixed presence of the active coarse and dense regions, the thickness of surface protection films remained after the CMP process on the active regions is different between the active coarse and dense regions. This difference is called “global step difference.” The global step difference is made by elastic deformation of a polishing pad, which is in contact with the insulation film through slurry, resulting from the coarse/dense condition of the active region in the CMP process.
More specifically, the surface of an insulation film in the active coarse region is so flat that the polishing pressure of the polishing pad on the insulation film is substantially even. On the other hand, the surface of an insulation film in the active dense region is so uneven that the polishing pressure of the polishing pad on the insulation film is dispersed. As a result, the polishing rate (speed) in the active dense region is lower than that of the active coarse region, resulting in the uneven film thickness between the active coarse and dense regions or causing a global step difference. In the case of a large global step difference, at the end of the CMP process, the active coarse region is ground but the insulation film remains on the active dense region. This lowers the reliability or yield of the resultant semiconductor device.
The inventors have discovered that the problem is solved by estimating the thickness distribution of the protection film remained on the active region and correcting the mask with the estimated thickness distribution. The thickness distribution is a distribution of estimated thickness of the remaining film between the active coarse and dense regions after the CMP process.